1. Field of the Invention
The present invention relates to power management units for portable applications, and more particularly to high efficiency, low loss power management units.
2. Description of the Related Art
Power management in portable electronic systems, such as cellular phone, portable PDAs, laptops, etc. is an important issue, as consumers increasingly demand longer times between recharging. For example, a cellular phones typically has three power sources: a rechargeable main battery, a small coin-sized backup battery, and a line charger that can be plugged into a wall outlet or a car outlet. Typical main battery voltage is between about 3.3 volts and 4.6 volts. Typical charger voltage is 5–20V.
Power management units (PMUs) are often manufactured using non-standard (i.e., high voltage) CMOS processes or using bi-polar. In the case of CMOS PMUs, power efficiency and the breakdown voltage of the CMOS devices are important parameters to consider. For 0.35 micron manufacturing technology, the typical breakdown voltage of the CMOS devices is approximately 3.3 volts. As feature size decreases, the breakdown voltage of the CMOS device also decreases. However, the battery voltage, or some other operational power source (e.g., the line charger), normally has a higher voltage than the breakdown voltage. Therefore, the battery voltage needs to be regulated down to 3.3 volts so as to be suitable for use by the power management unit and the rest of the circuitry.
Conventional alternatives for managing the breakdown voltage issue include the use of bipolar technology, or the use of special (high-voltage) CMOS devices. However, the use of bipolar technology presents difficulties with integrating the bipolar elements with other CMOS circuit elements. Thus, it is desirable to use low voltage CMOS devices to implement high voltage power management.
If only CMOS devices are used, the breakdown problem could be overcome by the use of several CMOS devices. For example, a number of CMOS devices could be cascaded in order to share the voltage drop to avoid breakdown in each device. The drawback of such an approach is an increase in power dissipation because the whole branch cannot be powered down. In particular, if every circuit has all the functionality of breakdown protection, the power dissipation is significantly increased. This is particularly a problem in the OFF mode, where the cascoded CMOS devices dissipate power even while the rest of the circuitry is “asleep.” In other words, there is a constant current flow to the CMOS devices whose sole purpose is breakdown prevention. This decreases the life of the main battery, which is an important concern in portable applications, such as cellular phones.
Accordingly, what is needed is a power management unit that provides a high efficiency both during operation and when the circuitry is off, and which is compatible with existing CMOS processes.